|
Date
|
Lecture Number
|
Lab Number
|
Subject
|
Reading
|
HW In
|
HW Out
|
|
W 9/5
|
-
|
1
|
NO LAB
|
-
|
-
|
-
|
|
Th 9/6
|
1
|
-
|
Course Introduction
|
P&H Ch. 1
|
-
|
HW 1
|
|
M 9/10
|
2
|
-
|
Numeric Representation I
|
P&H 3.1 - 3.3
|
-
|
-
|
|
W 9/12
|
-
|
2
|
Lab 1 |
-
|
-
|
-
|
|
Th 9/13
|
3
|
-
|
Numeric Representation II
|
P&H 3.6, 3.8 - 3.9
|
HW 1
|
HW 2
|
|
M 9/17
|
4
|
-
|
Basic Logic Gates
|
P&H Appendix B: B.1 - B.2
|
-
|
-
|
|
W 9/19
|
-
|
3
|
Lab 2
|
-
|
-
|
-
|
|
Th 9/20
|
5
|
-
|
Boolean Algebra
|
P&H Appendix B: B.2
|
HW 2
|
HW 3
|
|
M 9/24
|
6
|
-
|
Basic Digital Circuits
|
P&H Appendix B: B.3
|
-
|
-
|
|
W 9/26
|
-
|
4
|
Lab 3
|
-
|
-
|
-
|
|
Th 9/27
|
7
|
-
|
The ALU
|
P&H Appendix B: B.5
|
HW 3
|
HW 4
|
|
M 10/1
|
8
|
-
|
Clocks, Flip-Flops and Latches
|
P&H Appendix B: B.7 - B.8
|
-
|
-
|
|
W 10/3
|
-
|
5
|
Lab 4
|
-
|
-
|
-
|
|
Th 10/4
|
9
|
-
|
Registers and Memory
|
P&H Appendix B: B.8 - B.9
|
HW 4
|
HW 5
|
|
M 10/8
|
-
|
-
|
NO CLASS - Fall break
|
-
|
-
|
-
|
|
W 10/10
|
-
|
6
|
Lab 5
|
|
-
|
-
|
|
Th 10/11
|
10
|
-
|
Assessing and Understanding Performance I
|
P&H 4.1 - 4.3
|
HW 5
|
HW 6
|
|
M 10/15
|
11
|
-
|
Assessing and Understanding Performance II
|
P&H 4.5-4.6
|
-
|
-
|
|
W 10/17
|
-
|
7
|
Lab 6
|
|
-
|
-
|
|
Th 10/18
|
12
|
-
|
EXAM 1
|
-
|
-
|
-
|
|
M 10/22
|
13
|
-
|
A Basic MIPS Implementation - Introduction
|
P&H 5.1 - 5.2
|
-
|
-
|
|
W 10/24
|
-
|
8
|
Lab 7
|
-
|
-
|
-
|
|
Th 10/25
|
14
|
-
|
Discussion
|
-
|
HW 6
|
HW 7
|
|
M 10/29
|
15
|
-
|
A Basic MIPS Implementation - Building a Datapath
|
P&H 5.3
|
-
|
-
|
|
W 10/31
|
-
|
9
|
Lab 8
|
-
|
-
|
-
|
|
Th 11/1
|
16
|
-
|
Class cancelled.
|
|
-
|
-
|
|
M 11/5
|
17
|
-
|
A Basic MIPS Implementation - Implementing the Datapath
and Control
|
P&H 5.4
|
-
|
-
|
|
W 11/7
|
-
|
10
|
Lab 9
|
-
|
-
|
-
|
|
Th 11/8
|
18
|
-
|
Introduction to the MIPS Architecture and Instruction
Set Architectures
|
P&H 2.1 - 2.3, Appendix D: D.1
|
HW 7
|
HW 8
|
|
M 11/12
|
19
|
-
|
Basic MIPS Instructions and I/O
|
P&H Appendix A: A.9, those parts of A.10 covered in
class
|
-
|
-
|
|
W 11/14
|
-
|
11
|
Lab 10
|
-
|
-
|
-
|
|
Th 11/15
|
20
|
-
|
MIPS Logical Operations and Branching
|
P&H 2.5 - 2.6
|
HW 8
|
HW 9
|
|
M 11/19
|
21
|
-
|
MIPS Stack Programming and Methods I
|
P&H 2.7
|
-
|
-
|
|
W 11/21
|
-
|
-
|
NO LAB - Thanksgiving Break
|
-
|
-
|
-
|
|
Th 11/22
|
-
|
-
|
NO CLASS - Thanksgiving Break
|
-
|
-
|
-
|
|
M 11/26
|
22
|
-
|
MIPS Stack Programming and Methods II
|
P&H 2.7
|
-
|
Final Project
|
|
W 11/28
|
-
|
12
|
Lab 11
|
-
|
-
|
-
|
|
Th 11/29
|
23
|
-
|
MIPS Machine Code and Addressing Modes
|
P&H 2.4, 2.9
|
HW 9
|
HW 10
|
|
M 12/3
|
24
|
-
|
EXAM II
|
-
|
-
|
-
|
|
W 12/5
|
-
|
13
|
Lab 12
|
-
|
-
|
-
|
|
Th 12/6
|
25
|
-
|
Translating and Starting a Program
|
P&H 2.10, Appendix A: A.1-A.4
|
-
|
-
|
|
M 12/10
|
26
|
-
|
Introduction to Operating Systems |
-
|
HW 10
|
-
|