CS 240 Lab 4

Learning Goals & Reflection

CS 240 Lab 4

• Lab slides
• Lab notebook

Learning Goals

Core Goals

Students can:

1. Explain the design and operation of an Arithmetic Logic Unit: (Your mastery: 0 - No knowledge 1 - Learning 2 - Mastering 3 - Mastered )
   1. Explain how an ALU can perform multiple different operations, and which inputs control which operation it performs.
   2. Explain how multiplexers are used to control input inversion in an ALU.
   3. Explain how input inversion and carry-in can be used to implement subtraction, NAND, and NOR using an ALU that only has chips for OR, AND, and addition.
   4. Build a simulated ALU using basic logic gates, an adder, and multiplexers.
   5. Fill out the truth table for an ALU.
   6. Debug a simulated ALU by testing its outputs against a truth table.
   7. Explain how a multi-bit ALU can be constructed from a series of 1-bit ALUs, including how to connect the control lines.
   8. Design and implement the sign, overflow, and zero outputs from a multi-bit ALU.
2. Explain how Latch and Flip-Flop circuits work: (Your mastery: 0 - No knowledge 1 - Learning 2 - Mastering 3 - Mastered )
   1. Define bistable and give an example of a bistable circuit.
   2. Build an SR latch in a simulator using two NOR gates.
   3. Explain why the output of an SR latch is not always predictable, including what sequence of events triggers unpredictable behavior and the ways that behavior can resolve itself in practice.
   4. Build an SR latch on the workbench by wiring together NOR gates in a 7402 chip.
   5. Add AND gates to an SR latch to create a clocked SR latch, both in simulation and on the workbench.
   6. Explain the purpose of a “clock” signal within a memory system.
   7. Explain why a D latch is preferable to an SR latch.
   8. Implement a D latch in a simulator using AND, NOR, and NOT gates.
   9. Explain the difference between a D latch and a D flip-flop.
   10. Implement a D flip-flop in a simulator using two D latches.
   11. Explain the difference between a rising-edge and a falling-edge trigger.
3. Explain the operation of a register: (Your mastery: 0 - No knowledge 1 - Learning 2 - Mastering 3 - Mastered )
   1. Explain how multiple D flip-flops should be connected to create a register file.
   2. Give an example of the circuit diagram notation for a multi-wire bus, and explain what it means.
   3. Explain what happens when a register file is read from and written to at the same time in a single clock cycle.
4. Explain the operation of a register file: (Your mastery: 0 - No knowledge 1 - Learning 2 - Mastering 3 - Mastered )
   1. Explain what the CLR and CLK inputs to a register file do.
   2. Explain how to write data into or read data from a particular register in a register file.
   3. Explain how multiple registers are connected to create a register file, including how a decoder and several multiplexers are used within the register file.

Stretch goals

1. Explain how Latch and Flip-Flop circuits work: (Your mastery: 0 - No knowledge 1 - Learning 2 - Mastering 3 - Mastered )
   1. Explain why the fact that the output of a D flip-flop doesn’t change until the falling edge of the clock is useful in a system where many D flip-flops are used.
   2. Explain what would happen if D latches were used in place of D flip-flops for a register file if we want to read from that register file and write a result back into it in the same clock cycle.
2. Explain the operation of random access memory: (Your mastery: 0 - No knowledge 1 - Learning 2 - Mastering 3 - Mastered )
   1. Explain what “random” means in the term “random access memory.”
   2. Explain the difference between address and data inputs for a RAM.
   3. Explain how the “write enable” input for a RAM works.
   4. Explain how to calculate the number of address inputs needed for a RAM that holds a certain number of words.
   5. Explain how to calculate the total size of a ram in bits/bytes based on the word size and the number of address bits.
   6. Explain the purpose of a decoder within a RAM circuit.
   7. Explain the purpose of tri-state buffers on the output side of a RAM circuit.

Reflection